Episodes

Tuesday Oct 13, 2020
Episode 30: Architectural verification and deadlocks
Tuesday Oct 13, 2020
Tuesday Oct 13, 2020
In this podcast, Dr. Darbari discusses architectural formal verification and deadlocks in processors. Deadlocks can cause all sorts of issues in the design and though you may believe that reset would be a great way of bringing the chip out of the deadlock, your customers may not want to always reboot the device. Use Axiomise formalISA to find & fix deadlocks and if you like prove that they have been fixed.

Tuesday Sep 22, 2020
Episode 29: A fireside chat with Michiel Ligthart
Tuesday Sep 22, 2020
Tuesday Sep 22, 2020
This week, Dr. Darbari talks to Michiel Ligthart. Discover Michiel's interesting journey from the Netherlands to the USA and find out how he ended being the president and chief operating officer of Verific Design Automation - one of the most well-known names in the EDA industry. We talk about the impact Verific is making in the design of several EDA tools including one of our favorite formal tools that use Verific to compile 1.1 billion gate designs for functional formal verification in under an hour.

Tuesday Sep 15, 2020
Episode 28: A fireside chat with Professor Alastair Donaldson
Tuesday Sep 15, 2020
Tuesday Sep 15, 2020
In this week's podcast, Dr. Darbari talks to Professor Alastair Donaldson. He talks about a range of topics in software verification and describes how he went from being a keen musician to being a professor in computer science at Imperial College, London, and a software engineer at Google. We talk about formal verification, metamorphic testing, concurrency, compilers, OpenCL, OpenGL, compiler bugs, the semantics of programming languages, SMT solvers, Z3, and as Alastair points out everything that is focussed on software correctness, performance, and portability. We also discuss computer science education at Imperial College.

Tuesday Sep 08, 2020
Tuesday Sep 08, 2020
Dr. Darbari demystifies the topic of architectural formal verification with the focus on RISC-V. He describes the similarities with simulation-based compliance testing and key benefits of using formalISA and formal verification for architectural compliance. A brand-new blog on this topic is available from Tech Design Forums.

Friday Aug 21, 2020
Episode 26: A fireside chat with Steve Hoover
Friday Aug 21, 2020
Friday Aug 21, 2020
In this podcast, Dr. Ashish Darbari talks to Steve Hoover, founder & CEO of Redwood EDA. Steve explains why he left a well-paid job at Intel to start Redwood EDA. Ashish asks Steve about why he has another language. The chat dives deep into Transactional Verilog (TL-Verilog), and why we should care about it? Steve explains how TL-Verilog will be a game-changer for RISC-V, formal methods, abstraction, UVM, tools, better debug, and open-source silicon efforts. Steve explains how his course is changing the way students learn digital design, computer architecture, and processor design. Do not forget to listen to Steve’s five tips.
The new course registration deadline is 24 August. Register at: https://www.vlsisystemdesign.com/riscv-based-myth/

Tuesday Aug 11, 2020
Episode 25: A fireside chat with Ted Miracco
Tuesday Aug 11, 2020
Tuesday Aug 11, 2020
In this week's podcast, Dr. Darbari talks to Ted Miracco, CEO of Cylynt. Ted explains how he founded Cylynt, why it is called Cylynt, and what is the differentiation of its products. Find out how Cylynt technology is preventing software piracy and if you're a software company you may want to look at this product!

Wednesday Jul 29, 2020
Episode 24: A fireside chat with Bipul Talukdar
Wednesday Jul 29, 2020
Wednesday Jul 29, 2020
In this podcast, Dr. Darbari talks to Bipul Talukdar from SmartDV. Bipul tells us that SmartDV has the largest portfolio of VIPs in the industry and he explains why this is so? Find out, how Bipul made his journey from Assam in India to leading a cutting-edge application engineering team at Smart DV?

Monday Jul 20, 2020
Episode 23: A fireside chat with Matt Venn
Monday Jul 20, 2020
Monday Jul 20, 2020
Dr. Darbari talks to Matt Venn from Symbiotic EDA. Matt is working with Symbiotic EDA, promoting the use of Open Source Formal Verification tools in the IC and FPGA industries. Matt explains how Symbiotic EDA plans to disrupt the established market of formal methods by providing formal tools at a price that all can afford. Matt believes that Symbiotic EDA is incorporating new advanced technology in their tools and they provide an open-source version of their tools that gets used a lot amongst the research community. Find out why Matt believes this open-source model will give Symbiotic EDA an edge in the commercial domain as well.

Sunday Jul 19, 2020
Episode 22: A fireside chat with Kiran Vittal
Sunday Jul 19, 2020
Sunday Jul 19, 2020
Dr. Darbari sat down with Kiran Vittal from Synopsys and asks him why does Synopsys care about formal methods? Kiran is a Senior Product Marketing Director in the Verification Group at Synopsys, with 25 years of experience in EDA and semiconductor design. Kiran outlines that Synopsys is seeing massive traction for formal methods and the year-on-year growth in Synopsys for formal methods is clear evidence of this. When asked, how can budget companies afford formal tools from Synopsys, Kiran explains that Synopsys can also offer cost-effective solutions.

Sunday Jul 19, 2020
Episode 21: A fireside chat with Joe Hupcey III
Sunday Jul 19, 2020
Sunday Jul 19, 2020
In this year's DAC special, Dr. Darbari sat down with Joe Hupcey III from Mentor – a Siemens Business. Joe is a part of the Mentor’s Product Management team for Design & Verification Technologies; based in Mentor’s office in Silicon Valley, CA. He is responsible for the Questa Formal product line of automated applications and advanced property checking. Joe explains how from the days of 0-in acquisition Mentor has continued to invest in formal methods and now as part of Siemens, this investment is only growing. Despite selling simulation & emulation tools, Joe believes formal methods is one of the main technologies at Mentor being used in all shapes from apps to property checking.